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BH1751FVI
Technical Note
Write measurement command and Read measurement result are done by I C Bus interface. Please refer the formally
specification of I C Bus interface, and follow the formally timing chart.
● I 2 C Bus Access
1) I 2 C Bus Interface Timing chart
2
2
SDA
t HD ; STA
t f
t LOW
t r
t SU ; DAT
t f
HD
t r
t BUF
SCL
S
S
t HD ; STA
t HD ; DAT
t
t HIGH
t SU ; STA
Sr
t SU;STO
P
S
S
2) Slave Address
Slave Address is 2 types, it is determined by ADDR Terminal
ADDR = ‘H’ ( ADDR ≧ 0.7VCC ) → “1011100“
ADDR = 'L' ( ADDR ≦ 0.3VCC ) → “0100011“
3) Write Format
BH1751FVI is not able to accept plural command without stop condition. Please insert SP every 1 Opecode.
ST
Slave Address
R/W
0
Ack
Opecode
Ack
SP
4 ) Read Format
ST
Slave Address
R/W
1
Ack
High Byte [15:8]
2 15 2 14 2 13 2 12 2 11 2 10 2 9 2 8
Ack
2 7
2 6
Low Byte [7:0]
2 5 2 4 2 3 2 2
2 1
2 0
Ack
SP
+ 2 9 + 2 8 + 2 7 + 2 4 ) / 1.2 ≒ 28067 [ lx ]
(2
from Master to Slave
ex )
High Byte = "1000_0011"
Low Byte = "1001_0000"
15
* I 2 C BUS is trademark of Phillips Semiconductors. Please refer formality specification.
from Slave to Master
www.rohm.com
? 2011 ROHM Co., Ltd. All rights reserved.
9/16
2011.11 - Rev.B
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